1. Field of the Invention
Embodiments of the invention relate to power converters and control methods thereof, and, in particular, to suppressing electromagnetic noise that is generated in a switching operation of power semiconductor elements constituting power converters.
2. Related Art
A power converter, such as an inverter for driving a motor, outputs power for controlling the motor, which is a load, by switching a power semiconductor element.
A self arc-extinguishing type power semiconductor element, such as an IGBT (Insulated Gate Bipolar Transistor) or a MOS-FET (Metal Oxide Silicon Field Effect Transistor), is known as the power semiconductor element described above. The IGBT is used hereinafter to describe the power semiconductor element.
A power semiconductor module that has a power semiconductor element such as IGBT stored in one package is used as the power converter.
A so-called intelligent power module (referred to as “IPM” hereinafter) has been put to practical use. The IPM is obtained by storing a plurality of IGBTs, a drive circuit for driving these IGBTs, a protective circuit for protecting the IGBTs from overcurrents and other abnormal states, and an insulated power supply for the drive circuit, in one package.
FIG. 8 is a diagram showing the exterior of the IPM. A resin container 200 has main terminals 2a, 2b to be connected to a high-voltage large current main circuit portion. The inside of the container 200 is provided with a control terminal 2c for outputting, to a drive circuit of an IGBT (not shown), an ON/OFF signal for externally driving the IGBT, or for connecting a drive power supply to the drive circuit.
FIG. 10 is a diagram showing a circuit configuration of an inverter for driving a motor. In FIG. 10, reference numeral 1 represents a DC power supply obtained by rectifying a commercial power supply, 2 an IPM, and 5 a motor functioning as a load.
The IPM 2 is connected between positive and negative electrodes of the DC power supply 1. Two IGBTs 3U, 3X, which are power semiconductor elements, are connected in series between the positive and negative electrodes (between terminals 2a) in the IPM 2. Additionally, reflux diodes (FWD) 4U, 4X are connected in inverse-parallel to the IGBTs 3U, 3X. This series circuit is connected in parallel between power supplies in accordance with the number of phases of the load (for example, three circuits, in case of driving a three-phase motor).
In FIG. 10, since the load 5 has three phases, IGBTs 3V, 3Y, 3W, 3Z and FWDs 4V, 4Y, 4W, 4Z are connected in parallel with the IGBTs 3U, 3X and the FWDs 4U, 4X. By alternately switching these IGBTs that are connected vertically in series, DC power of the DC power supply 1 is converted into AC power of an arbitrary frequency and voltage, which is then output from the terminals 2b. 
The motor 5 is supplied with the AC power that is output from the terminals 2b, and is driven as a load at a variable speed. In FIG. 10, reference numeral 6 represents a snubber capacitor and 7 a drive circuit. Reference numerals 2a, 2b and 2c correspond to the terminals of the container 200 of the IPM 2 shown in FIG. 8.
The patterns of ON/OFF signals that are supplied to the respective gates of the IGBTs (3U to 3W, 3X to 3Z) are obtained generally by PWM control. The ON/OFF signals for driving the respective IGBTs are generated by an external control circuit of the IPM 2.
In FIG. 10, reference numeral 20 represents a control circuit provided outside the IPM 2. Reference numerals 8 to 10 represent voltage command circuits for outputting output voltage command values Vu, Vv and Vw of respective phases, which are output by the IPM 2 (an inverter circuit for driving a motor). The output voltage command values Vu, Vv and Vw of these voltage command circuits 8 to 10 are compared with a carrier wave CW output from a carrier wave generating circuit 12 by a comparator 11, to determine PWM patterns. The PWM patterns are generated as ON/OFF signals (pulses PU1, PV1, PW1, PX1, PY1, PZ1) to the respective IGBTs (3U to 3W, 3X to 3Z) by a pulse distribution circuit 13. The generated ON/OFF signals are sent to the terminals 2c of the IPM 2.
FIG. 9 is a timing diagram of a method for generating the PWM patterns described above. A three-phase inverter compares the levels of the three output voltage command values Vu, Vv and Vw, which are output from the voltage command circuits 8, 9 and 10 and the phases of which are different from each other by 120°, with the level of the carrier wave CW output from the carrier wave generating circuit 12 (see FIG. 9(a)). In a case where the levels of sine waves corresponding to the output voltage command values are greater than the level of the carrier wave CW, ON signals are applied to the IGBTs in an upper arm of the phases, and OFF signals are applied to the IGBTs in a lower arm.
For example, the U-phase output voltage command value Vu is compared with the carrier wave CW. When the U-phase output voltage command value Vu is greater than the carrier wave CW, an ON signal is applied to the IGBT 3U configuring the upper arm, and an OFF signal is applied to the IGBT 3X configuring the lower arm of the same phase.
Similarly, the same comparison is carried out for the V-phase and W-phase output voltage command values, and ON/OFF patterns for the IGBTs 3V, 3Y, 3W, 3Z of the respective phases are determined.
Such ON/OFF signals are input to the terminals 2c of the IPM 2 and amplified in such a manner that the IGBTs can be driven by the drive circuit 7, thereby driving the IGBTs. By alternately turning the serially connected IGBTs (3U to 3W, 3X to 3Z) vertically, the DC power of the DC power supply 1 is supplied to the motor 5 as an AC power of controlled frequency and voltage.
In the inverter for driving a motor, shown in FIG. 10, the IGBTs (3U to 3W, 3X to 3Z) switch the DC power supply of a high-voltage large current in the IPM 2. For this reason, an increase of electromagnetic noise that is generated at the time of switching is the problem. Generation of electromagnetic noise causes errors in other devices installed in the vicinity of the inverter for driving a motor and generates noise in the radio and the like. Therefore, the characteristics of switching operations of IGBTs configuring a power converter, such as an inverter for driving a motor, are required to generate less noise.
FIG. 7 is a schematic diagram showing a cause of generation of electromagnetic noise. FIG. 7(a) is a diagram schematically showing the U-phase of the IPM 2.
As shown in FIG. 10, the capacitor (snubber capacitor) 6 with low impedance is connected between the DC terminals 2a of the IPM, for the purpose of controlling a spike voltage that is generated when the IGBTs (3U to 3W, 3X to 3Z) of the respective phases are switched. The capacity of the snubber capacitor 6, parasitic inductances on wiring, and a capacity of a P-N junction between each IGBT (3U to 3W, 3X to 3Z) and each FWD (4X to 4W, 4X to 4Z) form an LC series resonant circuit. Switching the IGBTs/FWDs resonates the series resonant circuit and a high-frequency resonance current shown by a dashed line in FIG. 7(a). This high-frequency resonance current generates a magnetic field, causing noise.
In some cases, in order to obtain a current capacity, in the IPM 2 the IGBTs (3U to 3W, 3X to 3Z) and the FWDs (4X to 4W, 4X to 4Z) of the respective phases are configured by connecting a plurality of elements in parallel.
FIG. 7(b) shows a case in which two pairs of elements configuring the U-phase are connected in parallel. In other words, IGBTs 3X1, 3X2 shown in FIG. 7(b) correspond to the IGBT 3x shown in FIG. 7(a). The same is true for the other elements.
In FIG. 7(b), the IGBTs 3X1, 3X2 are turned ON/OFF at the same time. Therefore, two high-frequency resonance currents flow and overlap with each other between the DC terminals 2a, as shown by dashed lines. For this reason, electromagnetic noise tends to increase, compared to the case shown in FIG. 7(a).
It is generally effective to reduce the speed of switching an IGBT in order to suppress the generation of a high-frequency current, as described above. The speed of switching an IGBT indicates a time period between when the IGBT is turned OFF and when the IGBT is turned ON, and a time period between the IGBT is turned ON and when the IGBT is turned OFF. The ON state of the IGBT changes slowly to the OFF state as a result of reducing the switching speed, preventing the generation of a high-frequency resonance current. However, because switching losses increase, excessive reduction of the switching speed is not preferred.
Even when the switching speed is reduced, electromagnetic noise further increases when an IGBT or FWD of a certain phase and an IGBT or FWD of another phase are switched simultaneously.
Such simultaneous switching of multiple phases occurs when the voltage command values of a plurality of phases are equal to each other. The simultaneous switching of multiple phases occurs at points (A) and (B) shown in FIG. 9. In the point (A), the waveform of a U-phase voltage command is equal to the waveform of a V-phase voltage command. When these voltage command values are compared in size with a carrier wave, ON signals are applied simultaneously to the U-phase IGBT (3U) and the V-phase IGBT (3V) and OFF signals are applied simultaneously to the X-phase IGBT (3X) and the Y-phase IGBT (3Y), as shown in FIG. 10.
Similarly, the U-phase voltage command value and the W-phase voltage command value are equal to each other at the point (B). Therefore, switching signals are applied simultaneously to the U-phase IGBT (3U) and the W-phase IGBT (3W) as well as to the X-phase IGBT (3X) and the Z-phase IGBT (3Z).
FIG. 11 is a waveform diagram showing the simultaneous switching of multiple phases. For instance, as shown in the point (A) of FIG. 9, when the U-phase IGBT (3U) is turned ON as shown in FIG. 11(a) and, at the same time, the Y-phase IGBT (3Y) is turned OFF as shown in FIG. 11(b), high-frequency resonance currents that are generated by separate switching operations of these IGBTs are overlapped with each other. As a result, the peaks of the high-frequency resonance currents increase as shown in FIG. 11(e), resulting in an increase of electromagnetic noise.
Thus, there are known devices and methods for adjusting pulses to prevent simultaneous switching of upper arm-side elements and lower arm-side elements when a voltage command value of a power converter (an inverter device) is zero and a time difference between an ON-command time of the upper arm and an ON-command time of the lower arm is the same in each phase. See, for example, Japanese Patent Application Publication No. 2008-236889 (also referred to herein as “Patent Document 1”).
The conventional technology of Patent Document 1 is applied when the voltage command value of the power converter is zero. However, although this technology reduces noise generated as a result of simultaneous switching, the effect of noise reduction cannot be achieved under an operating condition where the power converter is used in a normal state. In addition, the effect of noise reduction is not obtained when the upper arm-side elements of a plurality of phases of the power converter are switched simultaneously. Thus, as described above, there is a need in the art for improved power converters.